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1/18 january 2003 n complete interface for two lnbs remote supply and control n lnb selection and stand-by function n built-in tone oscillator factory trimmed at 22khz n fast oscillator start-up facilitates diseqc ? encoding n two supply inputs for lowest dissipation n bypass function for slave operation n lnb short circuit protection and diagnostic n auxiliary modulation input extends flexibility n cable length compensation n internal over temperature protection n backward current protection description intended for analog and digital satellite receivers, the lnbp is a monolithic linear voltage regulator, assembled in multiwatt-15, powerso-20 and powerso-10, specifically designed to provide the powering voltages and the interfacing signals to the lnb downconverter situated in the antenna via the coaxial cable. since most satellite receivers have two antenna ports, the output voltage of the regulator is available at one of two logic-selectable output pins (lnba, lnbb). when the ic is powered and put in stand-by (en pin low), both regulator outputs are disabled to allow the antenna downconverters to be supplied/ controlled by others satellite receivers sharing the same coaxial lines. in this occurrence the device will limit at 3 ma (max) the backward current that could flow from lnba and lnbb output pins to gnd. for slave operation in single dish, dual receiver systems, the bypass function is implemented by an electronic switch between the master input pin (mi) and the lnba pin, thus leaving all lnb powering and control functions to the master receiver. this electronic switch is closed when the device is powered and en pin is low. the regulator outputs can be logic controlled to be 13 or 18 v (typ.) by mean of the vsel pin for remote controlling of lnbs. additionally, it is possible to increment by 1v (typ.) the selected voltage value to compensate the excess voltage drop along the coaxial cable (llc pin high). in order to reduce the power dissipation of the device when the lowest output voltage is selected, the regulator has two supply input pins v cc1 and v cc2 . they must be powered respectively at 16v (min) and 23v (min), and an internal switch automatically will select the suitable supply pin according to the selected output voltage. if adequate heatsink is provided and higher power losses are acceptable, both supply pins can be powered by the same 23v source without affecting any other circuit performance. the ent (tone enable) pin activates the internal oscillator so that the dc output is modulated by a 0.3 v, 22khz (typ.) square wave. this internal oscillator is factory trimmed within a tolerance of 2khz, thus no further adjustments neither external components are required. a burst coding of the 22khz tone can be accomplished thanks to the fast response of the ent input and the prompt oscillator start-up. this helps designers who want to implement the diseqc ? protocols (*). in order to improve design flexibility and to allow implementation of newcoming lnb remote control standards, an analogic modulation lnbp10 series lnbp20 lnbp supply and control voltage regulator (parallel interface) powerso-10 1 10 power so-20 multiwatt-15
lnbp10 series - lnbp20 2/18 input pin is available (extm). an appropriate dc blocking capacitor must be used to couple the modulating signal source to the extm pin. when external modulation is not used, the relevant pin can be left open. two pins are dedicated to the overcurrent protection/monitoring: cext and olf. the overcurrent protection circuit works dynamically: as soon as an overload is detected in either lnb output, the output is shut-down for a time t off determined by the capacitor connected between cext and gnd. simultaneously the olf pin, that is an open collector diagnostic output flag, from high impedance state goes low. after the time has elapsed, the output is resumed for a time t on =1/15t off (typ.) and olf goes in high impedance. if the overload is still present, the protection circuit will cycle again through t off and ton until the overload is removed. typical t on +t off value is 1200ms when a 4.7 m f external capacitor is used. this dynamic operation can greatly reduce the power dissipation in short circuit condition, still ensuring excellent power-on start up even with highly capacitive loads on lnb outputs. the device is packaged in multiwatt15 for thru-holes mounting and in powerso-20 for surface mounting. when a limited functionality in a smaller package matches design needs, a range of cost-effective powerso-10 solutions is also offered. all versions have built-in thermal protection against overheating damage. (*): external components are needed to comply to level 2.x and above (bidirectiona) diseqc ? bus hardware requirements. diseqc ? is a trademark or eutelsat. ordering codes (*) available on request pin configuaration (top view) type multiwatt-15 powerso-20 powerso-10 lnbp10 lnbp10sp-tr (*) lnbp11 lnbp11sp-tr (*) lnbp12 LNBP12SP-tr (*) lnbp13 lnbp13sp-tr (*) lnbp14 lnbp14sp-tr (*) lnbp15 lnbp15sp-tr (*) lnbp16 lnbp16sp-tr (*) lnbp20 lnbp20cr lnbp20pd-tr powerso-20 powerso-10 multiwatt-15
lnbp10 series - lnbp20 3/18 table a: pin configurations note: the limited pin availability of the powerso-10 package leads to drop some functions. symbol name function pin number vs sales type (lnbp) 20cr 20pd 10sp 11sp 12sp 13sp 14sp 15sp 16sp v cc1 supply input 1 15v to 25v supply. it is automatically selected when v out = 13 or 14v 12111 111 v cc2 supply input 2 22v to 25v supply. it is automatically selected when v out = 18 or 19v 232222222 lnba output port see truth table voltage and port selection. in stand-by mode this port is powered by the mi pin via the internal bypass switch 343333333 v sel output voltage selection:13 or 18v (typ) logic control input: see truth table 454444444 en port enable logic control input: see truth table 565555555 osel port selection logic control input: see truth table 7 7 9 na na na na na na gnd ground circuit ground. it is internally connected to the die frame 81 10 11 20 66 6666 ent 22khz tone enable logic control input: see truth table 9137777777 cext external capacitor timing capacitor used by the dynamic overload protection. typical application is 4.7 m f for a 1200ms cycle 10148888888 extm external modulator external modulation input. needs dc decoupling to the ac source. if not used, can be left open. 11 15 na na na 9 na 9 9 llc line length compens. (1v typ) logic control input: see truth table 12 16 na na 9 na 9 na 10 olf over load flag logic output (open collector). normally in high impedance, goes low when current or thermal overload occurs 13 17 na 9 na na 10 10 na mi master input in stand-by mode, the voltage on mi is routed to lnba pin. can be left open if bypass function is not needed 14 18 na 10 10 10 na na na lnbb output port see truth tables for voltage and port selection 15 19 10 na na na na na na
lnbp10 series - lnbp20 4/18 absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi on is not implied. thermal data logic controls truth table note: all logic input pins have internal pull-down resistor (typ. = 250k w ) symbol parameter2 value unit v i dc input voltage (v cc1 , v cc2 , mi) 28 v i o output current (lnba, lnbb) internally limited ma v i logic input voltage (ent, en osel, vsel, llc) -0.5 to 7 v i sw bypass switch current 900 ma p d power dissipation at t case < 85c 14 w t stg storage temperature range -40 to +150 c t op operating junction temperature range -40 to +125 c symbol parameter value unit r thj-case thermal resistance junction-case 2 c/w control i/o pin name l h out olf i out > i omax or t j > 150c i out < i omax in ent 22khz tone off 22khz tone on in en see table below see table below in osel see table below see table below in vsel see table below see table below in llc see table below see table below en osel vsel llco v lnba v lnbb lxxx v mi - 0.4v (typ.) disabled h l l l 13v (typ.) disabled h l h l 18v (typ.) disabled h l l h 14v (typ.) disabled h l h h 19v (typ.) disabled h h l l disabled 13v (typ.) h h h l disabled 18v (typ.) h h l h disabled 14v (typ.) hhhh d isabled 19v (typ.)
lnbp10 series - lnbp20 5/18 block diagram
lnbp10 series - lnbp20 6/18 electrical characteristics for lnbp series (t j = 0 to 85c, c i = 0.22 m f, c o =0.1 m f, en=h, ent=l, llc=l, v in1 =16v, v in2 =23v i out =50ma, unless otherwise specified.) symbol parameter test conditions min. typ. max. unit v in1 v cc1 supply voltage i o = 500 ma ent=h, vsel=l, llc=l 15 25 v i o = 500 ma ent=h, vsel=l, llc=h 16 25 v v in2 v cc2 supply voltage i o = 500 ma ent=h, vsel=l, llc=l 22 25 v i o = 500 ma vsel=l, llc=h 23 25 v v o1 output voltage i o = 500 ma vsel=l, llc=l 17.3 18 18.7 v i o = 500 ma ent=h, vsel=l, llc=h 19 v v o2 output voltage i o = 500 ma vsel=l, llc=l 12.5 13 13.5 v i o = 500 ma ent=h, vsel=l, llc=h 14 v d v o line regulation v in1 =15 to 18v v out =13v 4 40 mv v in2 =22 to 25v v out =18v 4 40 mv d v o load regulation v in1 =v in2 =22v v out =13 or 18v i o = 0 to 3a 80 180 mv svr supply voltage rejection v in1 = v in2 = 23 0.5v ac f ac = 120 hz, 45 db i max output current limiting 500 650 800 ma t off dynamic overload protection off time output shorted c ext =4.7 m f 1100 ms t on dynamic overload protection on time output shorted c ext =4.7 m f t off /15 ms f tone tone frequency ent=h 20 22 24 khz a tone tone amplitude ent=h 0.55 0.72 0.9 vpp d tone tone duty cycle ent=h 40 50 60 % t r , t f tone rise and fall time ent=h 5 10 15 m s g extm external modulation gain d v out / d v extm , f = 10hz to 40khz 5 v extm external modulation input voltage ac coupling 400 mvpp z extm external modulation impedance f = 10hz to 40khz 400 w v sw bypass switch voltage drop (mi to lnba) en=l, i sw =300ma, v cc2 -v mi =4v 0.35 0.6 v v ol overload flag pin logic low i ol =8ma 0.28 0.5 v i oz overload flag pin off state leakage current v oh = 6v 10 m a v il control input pin logic low 0.8 v v ih control input pin logic high 2.5 v i ih control pins input current v ih = 5v 20 m a i cc supply current output disabled (en=l) 0.3 1 ma ent=h, i out =500ma 3.1 6 ma i obk output backward current en=l v lnba = v lnbb = 18v v in1 = v in2 = 22v or floating 0.23ma t shdn temperature shutdown threshold 150 c
lnbp10 series - lnbp20 7/18 typical characteristics (unless otherwise specified t j = 25c) figure 1 : output voltage vs output current figure 2 : tone duty cycle vs temperature figure 3 : tone fall time vs temperature figure 4 : tone frequency vs temperature figure 5 : tone rise time vs temperature figure 6 : tone amplitude vs temperature
lnbp10 series - lnbp20 8/18 figure 7 : s.v.r. vs frequency figure 8 : external modulation vs temperature figure 9 : bypass switch drop vs output current figure 10 : lnba external modulation gain vs frequency figure 11 : bypass switch drop vs output current figure 12 : overload flag pin logic low vs flag current
lnbp10 series - lnbp20 9/18 figure 13 : supply voltage vs temperature figure 14 : supply current vs temperature figure 15 : dynamic overload protection (i sc vs time) figure 16 : tone enable figure 17 : tone disable figure 18 : 22khz tone
lnbp10 series - lnbp20 10/18 figure 19 : enable time figure 20 : disable time figure 21 : 18v to 13v change figure 22 : 18v to 13v change
lnbp10 series - lnbp20 11/18 typical application schematics two antenna ports receiver single antenna receiver with master receiver port ja jb ant connectors 17v 24v mcu+v vcc1 1 vcc2 2 lnba 3 lnbb 15 gnd 8 llc 12 extm 11 osel 7 en 5 ent 9 vsel 4 olf 13 mi 14 cext 10 lnbp20cr c2 10uf r1 47k aux data c3 2x 0.1f c1 4.7f c4 c6 c5 2x 47nf tuner i/os mcu i/os vcc + 24v 17v mcu+v vcc1 1 vcc2 2 lnba 3 lnbb 15 gnd 8 llc 12 extm 11 osel 7 en 5 ent 9 vsel 4 olf 13 mi 14 cext 10 lnbp20cr c2 10uf aux data r1 47k tuner ant master c4 c5 47nf c3 2x 0.1f c1 4.7f i/os vcc mcu i/os +
lnbp10 series - lnbp20 12/18 using serial bus to save mpu i/os two antenna ports receiver: low cost solution vcc1 1 vcc2 2 lnba 3 lnbb 15 gnd 8 llc 12 extm 11 osel 7 en 5 ent 9 vsel 4 olf 13 mi 14 cext 10 lnbp20cr c2 10uf mcu+v r1 47k aux data str 1 d 2 clk 3 oe 15 q1 4 q2 5 q3 6 q4 7 q5 14 q6 13 q7 12 q8 11 qs 9 qs 10 4094 tuner ja jb ant connectors c4 c6 c5 2x 47nf c3 2x 0.1f c1 4.7f mcu+v serial bus mcu i/os vcc + 17v 24v ja jb ant connectors 17v 24v vcc1 1 vcc2 2 lnba 3 lnbb 10 gnd 6 cext 8 osel 9 en 5 ent 7 vsel 4 lnbp10sp c3 2x 0.1f c1 4.7f c4 c6 c5 2x 47nf tuner i/os mcu mcu+v i/os vcc +
lnbp10 series - lnbp20 13/18 connecting together v cc1 and v cc2 single antenna receiver with master receiver port: low cost solution ja jb ant connectors 24v vcc1 1 vcc2 2 lnba 3 lnbb 10 gnd 6 cext 8 osel 9 en 5 ent 7 vsel 4 lnbp10sp c1 4.7f c6 c5 2x 47nf c4 0.1f tuner i/os mcu mcu+v i/os vcc + 24v 17v vcc1 1 vcc2 2 lnba 3 mi 10 gnd 6 cext 8 extm 9 en 5 ent 7 vsel 4 lnbp13sp c2 10f aux data tuner ant master c4 c5 47nf c3 2x 0.1f c1 4.7f mcu+v i/os vcc mcu i/os +
lnbp10 series - lnbp20 14/18 single antenna receiver with overload diagnostic 24v 17v mcu+v c2 10f vcc1 1 vcc2 2 lnba 3 gnd 6 cext 8 extm 9 en 5 ent 7 vsel 4 olf 10 lnbp15sp aux data r1 47k tuner ant c4 c5 47nf c3 2x 0.1f c1 4.7f vcc i/os mcu i/os +
lnbp10 series - lnbp20 15/18 dim. mm. inch min. typ max. min. typ. max. a 5 0.197 b 2.65 0.104 c 1.6 0.063 d 1 0.039 e 0.49 0.55 0.019 0.022 f 0.66 0.75 0.026 0.030 g 1.02 1.27 1.52 0.040 0.050 0.060 g1 17.53 17.78 18.03 0.690 0.700 0.710 h1 19.6 0.772 h2 20.2 0.795 l 21.9 22.2 22.5 0.862 0.874 0.886 l1 21.7 22.1 22.5 0.854 0.870 0.886 l2 17.65 18.1 0.695 0.713 l3 17.25 17.5 17.75 0.679 0.689 0.699 l4 10.3 10.7 10.9 0.406 0.421 0.429 l7 2.65 2.9 0.104 0.114 m 4.25 4.55 4.85 0.167 0.179 0.191 m1 4.63 5.08 5.53 0.182 0.200 0.218 s 1.9 2.6 0.075 0.102 s1 1.9 2.6 0.075 0.102 dia1 3.65 3.85 0.144 0.152 multiwatt-15 mechanical data 0016036
lnbp10 series - lnbp20 16/18 dim. mm. inch min. typ max. min. typ. max. a 3.60 0.1417 a1 0.10 0.30 0.0039 0.0118 a2 3.30 0.1299 a3 0 0.10 0 0.0039 b 0.40 0.53 0.0157 0.0209 c 0.23 0.32 0.0090 0.0013 d (1) 15.80 16.00 0.6220 0.630 e 13.90 14.50 0.5472 0.5710 e 1.27 0.0500 e3 11.43 0.4500 e1 (1) 10.90 11.10 0.4291 0.4370 e2 2.90 0.1141 g 0 0.10 0.0000 0.0039 h 1.10 0.0433 l 0.80 1.10 0.0314 0.0433 n0?10? s0? 8?0? 8? t 10.0 0.3937 powerso-20 mechanical data 0056635 e a2 a e a1 pso20mec detail a t d 110 11 20 e1 e2 h x 45? detail a lea d slug a3 s gage plan e 0.35 l detail b r detail b (coplanarity) gc -c- seating plane e3 b c n n (1) d and e1 do not include mold flash or protusions - mold flash or protusions shall not exceed 0.15mm (0.00 6 ) 1
lnbp10 series - lnbp20 17/18 dim. mm. inch min. typ max. min. typ. max. a 3.35 3.65 0.132 0.144 a1 0.00 0.10 0.000 0.004 b 0.40 0.60 0.016 0.024 c 0.35 0.55 0.013 0.022 d 9.40 9.60 0.370 0.378 d1 7.40 7.60 0.291 0.300 e 9.30 9.50 0.366 0.374 e1 7.20 7.40 0.283 0.291 e2 7.20 7.60 0.283 0.300 e3 6.10 6.35 0.240 0.250 e4 5.90 6.10 0.232 0.240 e 1.27 0.050 f 1.25 1.35 0.049 0.053 h 13.80 14.40 0.543 0.567 h 0.50 0.002 l 1.20 1.80 0.047 0.071 q 1.70 0.067 0? 8? powerso-10 mechanical data 0068039-c detail "a" plane seating l a1 f a1 h a d d1 = = = = = = e4 0.10 a e1 e3 c q a = = b b detail "a" seating plane = = = = e2 6 10 5 1 e b he m 0.25 = = = =
lnbp10 series - lnbp20 18/18 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com

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